Frontiers'99
That the logic is obviously trivial in C and not when using Verilog conditional compilation justifies our decision. ... For example, the X axes can be parameters such as datapath width, array size, array area etc. ... That is because, in our hardware model, the multiplier, load/store, and floating point are all explicitly removed from the critical path by making them ... Eight and 16 bit pixel data dominate.
| Title | : | Frontiers'99 |
| Author | : | IEEE Computer Society, Goddard Space Flight Center, Universities Space Research Association, CESDIS. |
| Publisher | : | IEEE - 1999 |
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