Error Control for Network-on-Chip Links
This book provides readers with a comprehensive review of the state of the art in error control for Network on Chip (NOC) links. Coverage includes detailed description of key issues in NOC error control faced by circuit and system designers, as well as practical error control techniques to minimize the impact of these errors on system performance.45. 46. Ghoneima M et al (2006) Skewed repeater bus: a low power scheme for on-chip bus. ... (2004) A crosstalk aware interconnect with variable cycle transmission. ... J Electron Test Theor Appl (JETTA), Special Issue on Defect and Fault Tolerance, 67a81 Lehtonen T, Liljeberg P, Plosila J (2007) Analysis of forward erroranbsp;...
| Title | : | Error Control for Network-on-Chip Links |
| Author | : | Bo Fu, Paul Ampadu |
| Publisher | : | Springer Science & Business Media - 2011-10-09 |
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